H7 DeepSleep() flips the RTC clocksource from LSE to LSI

OpenMV Boards
1

I’m using an H743 with an external 32Khz xtal. I found I can set the RTC clocksource to LSE in firmware. And it will continue to use the LSE until I call machine.deepsleep(). Power draw goes down as expected, but the RTC clocksource flips back to LSI.
The RCC.BDCR register shows the LSE still on immediately before deepsleep(), but after going into deepsleep() it runs slow by about 2 seconds per minute, and when it wakes up the BDCR register shows LSEON but the RTCSEL bits say the RTC source has been flipped back to LSI.
I posted on the MicroPython forum but no answers so far. Does the OpenMV deepsleep() assume no LSE?

2

Hi Doug,

The source for how deep sleep works is available: micropython/ports/stm32/powerctrl.c at aecbcdcfe92b4e92cdf71f9da7c9f287abcb7dc0 · openmv/micropython · GitHub

It’s mad complex though and not really written by us.

3

Thanks, and that’s exactly what I feared. I was shocked that they even tried to do a cross-platform command for DeepSleep/Standby/whatever. And their STM32 work seems F406-centric instead of H7. And whereas you promptly answer every forum question right away, they barely answer a quarter of the questions. Thanks! I’ll hack around it somehow! -Doug

4

Hi again, I see where the rtc.c gathers up some platform-specific register stuff into an rtc_info qstring. I’m guessing that rtc_info gets passed upstream to MicroPython. My suspicions are growing about this handoff of registers from firmware to MPy. Is there something that defines the format that MicroPython expects? Thanks!

5

No, it’s just a tuple, then you have to decode that tuple per the documentation.